Particular embodiments generally relate to all-digital phase locked loops.
Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
Various radio frequency synthesizers are known for use in various devices, such as transceivers. The radio frequency synthesizer generates a local oscillator frequency signal for a carrier. The radio frequency synthesizer may include a digital phase lock loop for generating the local oscillator frequency signal. A time to digital converter determines a time difference between the local oscillator frequency signal and a reference signal and provides a digital control signal to a digital processor. The digital processor generates a control signal for a digitally controlled oscillator that generates the local oscillator frequency signal.
Delays and skews may cause quantization errors in the time to digital converter. The quantization errors may cause the time to digital converter to generate an incorrect time difference and thereby cause the digital processor to provide an erroneous control signal to the digitally controlled oscillator.